| Title |
Date |
Abstract |
From |
|
 A 10 μm Pitch Interconnection Technology using Micro Tube Insertion into Al-Cu for 3D Applications
|
ECTC 2011
This material is posted here with permission of IEEE. |
Future 3-D applications require a very low pitch for interstrata vertical interconnection. The last ITRS assessment for vertical interconnection predicts a need for...
|
 CEA – LETI, MINATEC, LEM3 –CNRS/UPV-M
|
|
Low-Profile 3D Silicon-on-Silicon Multi-chip Assembly
|
ECTC 2011
This material is posted here with permission of IEEE. |
The focus of this paper is multi-chip 3D silicon-on-silicon assembly using low-profile lead-free (Sn-Cu) solder interconnects.
|
IBM T.J. Watson Research Center
|
|
Low Temperature Bonding of High Density Large Area Array Interconnects for 3D Integration
|
IMAPS 2010
This material is posted here with permission of Imaps.
|
The results of bonding and stress testing of Cu/Sn-Cu bonded dice and Cu-Cu thermo-compression bonded dice....
|
RTI International
|
|
Embedded active device packaging technology for real DDR2 memory chips
|
IWLPC
October 2010
Originally published in the IWLPC Proceedings |
As high-speed, high-density, and high-performance are the primary IC development targets, packaging becomes key technology...
|
Industrial Technology Research Institute (ITRI)
|
|
Fabrication and performance of InAs/GaSb-based superlattice LWIR detectors
|
SPIE Defense, Sensing
& Security
June 2010
Copyright 2010 SPIE |
InAs/GaSb-based type II superlattices (T2SL) offer a manufacturable FPA technology with FPA size, scalability and cost advantages over HgCdTe.
|
HRL Laboratories
|
|
Ultrathin 3D ACA FlipChip-In-Flex Technology
|
ECTC
June 2010
This material is posted here with permission of IEEE. |
Die thickness of common, high-volume chip stacks range between 50-100 µm while thinning industry aims towards ultrathin...
|
Berlin Technical University, NB Technologies and Fraunhofer IZM.
|
|
Three Chips Stacking with Low Volume Solder Using Single Re-Flow Process
|
ECTC
June 2010
This material is posted here with permission of IEEE. |
Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications.
|
Institute of Microelectronics - A*STAR
|
|
Insertion Bonding: A Novel Cu-Cu Bonding Approach for 3D Integration
|
ECTC
June 2010
This material is posted here with permission of IEEE. |
A novel low temperature Cu-Cu bonding approach called the insertion bonding technique has been developed.
|
IMEC and the Katholieke Universiteit Leuven
|
|
 Technical Bulletin N°3
|
February 2010 |
The SET Technical Bulletin is a compilation of technical articles written by our clients. Each article provides unique insights into the exciting area of C2W and C2C bonding.
|
CEA-Leti, IMEC, ITRI, IME-A*Star, RTI, etc...
|
|
RF MEMS and flip-chip for space flight demonstrator
|
June 2009 |
The next generation of telecommunication satellites payloads will require higher performances and higher..
|
Thales Alenia Space
|
|
Electrical characterization of high count, 10 µm pitch, room-temperature vertical interconnections.
|
Imaps
Device Packaging
March 2009
This material is posted here with permission of Imaps. |
In order to increase the format of heterogeneous staring arrays to 2Kx2K pixels or even larger complexities, limited substrate size and cost...
|
CEA-LETI
|
|
New Reflow Soldering and Tip in Buried Box (TB2) Techniques For Ultrafine Pitch Megapixels
Imaging Array.
|
ECTC
May 2008
This material is posted here with permission of IEEE. |
Flip chip is a high-density and highly reliable
interconnection technology which is mandatory for the
fabrication of high end imaging arrays.
|
CEA-LETI
|
Focus on Bonding!