FC300 with Direct Metallic Bonding configuration
CEA-Leti partnering with SET, STMicroelectronics, ALES and CNRS-CEMES on advanced Chip-to-Wafer technologies for 3D Integration.



 A partnership on advanced chip-to-wafer technologies for 3D integration led by SET and established with CEA-Leti, STMicroelectronics, ALES and the CEMES-CNRS, in the frame of the PROCEED project, comes to fruition with the introduction of a newly designed FC300.

The equipment is based on SET's high placement accuracy FC300 system and adapted to direct metallic bonding requirements. The first unit was recently installed at CEA-Leti to explore chip-to-wafer structures by direct metallic bonding for 3D integration. The customized tool is used in the two-year Minalogic PROCEED project funded by the French government.

 PROCEED Project: History & Contents

 The PROCEED Minalogic project is a 4.2 Million Euros, 24 months project supported by French FIU (Fond Interministeriel Unique). Started in 2009, the goal of the PROCEED project is to demonstrate high alignment accuracy (<1µm) of chip-to-wafer structures made by direct metallic bonding. Such structures are required for high performance 3D interconnexion circuits and enable a wide range of applications in microelectronics as well as in optoelectronics or MEMS.

Direct copper-to-copper bonding requires good planarity and excellent surface quality especially in terms of both particulate and metallic contamination. The low roughness of the copper pillars and pads as well as the topography between the copper and oxide areas are critical to obtain good bond strength at low force and room temperature.

The process, based on chip-to-wafer direct metallic bonding, is developed at CEA-Leti to overcome certain limitations in 3D integration. This technology consists of attaching chips on a substrate at low temperature and force, creating a bond of high mechanical and electrical integrity due to local metallic bonding.

ALES is supplying technology to support the surface preparation while CEMES-CNRS will be characterizes the bond quality and analyzes changes to the copper metallurgy during the annealing step. STMicroelectronics is driving the application of this technology for the high density 3D integration.

 Key Benefits

 This direct metal-to-metal bonding technology offers many advantages compare to conventional thermo-compression bonding.

The bonding process takes place at low force and room temperature, enabling higher accuracy bonding for high density interconnections by circumventing thermal expansion of differing materials. To ensure void-free bonding, the alignment and bonding steps must take place in a particle-free environment. This was accomplished by the use of special materials and careful management of the bonding environment to protect the wafer surface while it is fully populated with dice. A low-force bonding process is key to the high throughput required for widespread adoption of 3D IC Integration.

Any questions? Contact us at egreneche@set-sas.fr

 Click on the thumbnails below for a larger image!



 Press Announcement


 FC300
 Back to Homepage